D2S located in San Jose, is a premier player in the design and software approach to enhance the throughput of e-beam lithographic exposure. Our firm will offer the chip industry a much more efficient, affordable , productive methodology to produce chips. We are a well funded firm, currently have revenue, and we have about 15 employees. The CEO of this firm has a glittering track record having one firm that went IPO, and another that was acquired. We are seeking an individual who has worked a good deal in HPC or Parallel Systems and has exposure to Cuda or other parallel systems architecture.
Performance Optimization - Software Engineer (Should have successful background working with parallel systems architecture and C++)
D2S (Direct to Silicon) offers Design for Ebeam (DFEB) which is a design and software approach to enhance the throughput of e-beam lithographic exposure. DFEB uses advanced projection technology combined with design and software techniques to reduce a design´s required shot count, a key component in mask cost.
Position Responsibilities:
The Performance optimization engineer will be responsible for driving architecture and algorithms of the D2S system using parallel processing methods.
Requirements:
· Parallel systems knowledge with exposure and understanding of GPGPU (Cuda) or equivalent dedicated parallel system architecture.
· Strong knowledge and demonstrated results with complex algorithms, data structures and performance improvement.
· Excellent skills in software architecture, development and debugging using C++ and libraries ( Boost, STL, Qt).
· MS or PhD in CS/EE/Physics or equivalent
· EDA and/or DFM tools exposure is helpful but not required.
D2S is a leader in the ebeam movement in technology. We are working with cutting edge technologies that are both complex and challenging. We offer an outstanding compensation package / benefits with lucrative stock options . Please send your information to herbnj@gmail.com
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