Wednesday, April 6, 2011

[KITlist-Tech] Principal Engineer/ CPU (processor) Verification engineer (Sunnyvale, CA)

 


Please direct your responses to: elise@skylinerecruiting.com

local candidates please

please refer to: Job ID: 2964

Job Title: Principal Engineer/ CPU (processor) Verification engineer

Term: perm

Job Description:
Our client is an established global company with headquarters in Sunnyvale. Their products are high speed optical connectivity solutions, targeting a broad range of markets, including datacenters all the way to to consumer electronics. Their technology takes advantage of high-volume low-cost manufacturing techniques leveraged from the semiconductor industry. This group is responsible for the verification of next generation complex multi-core coherent processors. This includes development of verification methodologies, infrastructure, modeling techniques and verification test suites.

Specific Duties include:

Interacting with Architects/designers and work on defining the verification strategy.
Architecting verification environment.
Writing test plan and coverage plan, coding the environment.
Guiding verification engineers in the verification process.
Development of models wherever applicable.

Required Skills:
BSEE, MSEE or PhD.
Minimum 12 years of relevant experience with minimum 7 plus years of CPU verification experience.
Real project verification experience on processors (PowerPC, ARM, x86, SPARC).
Ability to understand and develop Assembly tests.
Should have gone through the processor verification cycle on at least 3 different generations.
CPU architecture knowledge (including multi processors, coprocessors, cache design, coherency and coherent interconnects).
Programming experience to include C/C++ and at least one scripting language (perl, Tcl).
Must have both Block level and full chip level verification experience.
Knowledge and proven experience in coverage driven and assertion based verification methodology.
Hands on experience with verification environment design, modeling and implementation using HVL languages like System Verilog/SystemC/vera.

send resume to: elise@skylinerecruiting.com

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