Please direct your responses to: elise@skylinerecruiting.com
LOCAL CANDIDATES PREFERRED
Job ID: 2885
Job Title: Principal RFIC Design Engineer
Term: perm
Job Description:
Our client is a fab-less semiconductor startup located in Fremont. The are developing wireless chipsets which will facilitate delivery of HDTV and other multimedia services over standard WiFi Networks. They are seeking another excellent RFIC Design Engineer to add to their team.
This person MUST be able to hit the ground running with recent design experience in WiFi, WiMax or LTE in recent CMOS technology nodes i.e. 90nm, 65nm.
*** Candidates from the following companies would be of the most interest to this client: Atheros, Broadcom, Marvell, Ralink, Qualcomm.
Required Skills:
Minimum MSEE degree, PhD is preferred, from a Top Notch school.
Minimum 4 years of experience in CMOS RF IC design.
Proven track record in CMOS RF/Analog IC design for commercial products.
Demonstrated design experience of wireless transceivers, building blocks
such as mixers, LNA, VCO/LO, PLL, PGA, filters, biasing circuits,
regulators, and op-amps.
Strong hands-on experience with Cadence RFIC design, layout, parasitic
extraction, and verification environment.
Hands-on with silicon measurement, evaluation, debugging,
characterization, and bring up.
Strong knowledge of CMOS technology (device physics, manufacturing
process, DFM, ESD).
Team player w/ good communication skills.
SEND RESUME TO: Elise@skylinerecruiting.com
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