DFT - LEAD
Company Description
Very exciting, fast growing, 3 ½ year old start- up company currently in stealth mode, developing interesting SoCs& platforms in a close collaboration with various partners and customers. Company has just closed a large round of financing and has solid financial backing from large corporate and financial investors that gives us several years of runway. Founded by an experienced team with many industry notables involved in various capacities. Company currently employs approximately around 50 people in US and we are ramping up the team to 75 within the coming months. Company has a strong R&D presence outside the US.
Job Description
We are looking for a senior DFT engineer to lead the DFX efforts at our company.
• Hands on DFT engineer with experience in developing DFT/DFD strategy and implementing the same at both RTL and at Netlist level.
• Must be capable of writing MBIST RTL for custom SRAMs.
• Experience with tools such as Cadence DFT Architect, FastScan and TestKompress is a must.
• Being able to implement DFT requirements in the RTL with Verilog is a plus.
• Must demonstrate experience with Scan insertion, segmentation, ATPG coverage analysis, and JTAG.
• Ability to verify DFT logic using OVM, VMM methodologies is a plus.
• Define and lead DFT/DFD activities for the company.
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