Please direct your responses to: susanhrinsj@gmail.com
CPU Design Verification Engineers: 3 positions open:
1 Technical Lead/Staff Engineer
2 Individual Contributors:
1 at 8+ years experience
1 at 5+ years experience
We are seeking 3 Design Verification engineers. at different levels for a high-end 64-bit super-scalar
microprocessor.
Responsibilities:
• Define the verification architecture of a high-end 64-bit super-scalar microprocessor.
• Lead a team of DV engineers in development of all test cases and test-bench architecture.
• Define the full-chip and block-level DV methodology.
• Draft the full-chip test plan and review the test scheme and test plane from each unit.
• Coordinate and manage the DV effort.
• Oversee the design/DV environment issues.
These are the responsibilities of the Technical Lead/Staff Engineer.
The responsibilities of the two Individual Contributors we seek for the DV team involve individual contributions toward the whole CPU DV effort, plus if appropriate, the coordination of small teams within the DV group for various blocks and functions of the overall CPU design.
To apply for this position, send resume to Susan Welch Human Resources Consulting, susanhrinsj@gmail.com. My client is an equal opportunity employer and values your individuality, as do I.
Requirements:
• Excellent written and verbal communication skills in English are required; additional communication skills in Chinese languages would be a plus.
• Must be a highly organized, detail-oriented self-starter, who works well independently as well as in a team environment.
• A MSEE or MSCE is strongly preferred.
Qualifications:
• For each level as specified above, an appropriate number of years hands-on, relevant experience in microprocessor design and/or design verification.
• Programming proficiency in System Verilog, C, C++, or System C.
• System Verilog is highly preferred.
• Microprocessor (CPU) experience is the only experience considered relevant. ASIC, FPGA experience and the like, will not be taken into account.
1 Technical Lead/Staff Engineer
2 Individual Contributors:
1 at 8+ years experience
1 at 5+ years experience
We are seeking 3 Design Verification engineers. at different levels for a high-end 64-bit super-scalar
microprocessor.
Responsibilities:
• Define the verification architecture of a high-end 64-bit super-scalar microprocessor.
• Lead a team of DV engineers in development of all test cases and test-bench architecture.
• Define the full-chip and block-level DV methodology.
• Draft the full-chip test plan and review the test scheme and test plane from each unit.
• Coordinate and manage the DV effort.
• Oversee the design/DV environment issues.
These are the responsibilities of the Technical Lead/Staff Engineer.
The responsibilities of the two Individual Contributors we seek for the DV team involve individual contributions toward the whole CPU DV effort, plus if appropriate, the coordination of small teams within the DV group for various blocks and functions of the overall CPU design.
To apply for this position, send resume to Susan Welch Human Resources Consulting, susanhrinsj@gmail.com. My client is an equal opportunity employer and values your individuality, as do I.
Requirements:
• Excellent written and verbal communication skills in English are required; additional communication skills in Chinese languages would be a plus.
• Must be a highly organized, detail-oriented self-starter, who works well independently as well as in a team environment.
• A MSEE or MSCE is strongly preferred.
Qualifications:
• For each level as specified above, an appropriate number of years hands-on, relevant experience in microprocessor design and/or design verification.
• Programming proficiency in System Verilog, C, C++, or System C.
• System Verilog is highly preferred.
• Microprocessor (CPU) experience is the only experience considered relevant. ASIC, FPGA experience and the like, will not be taken into account.
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Posted by: KIT List Jobs <jobposting2@kitlist.org>
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