Wednesday, June 22, 2011

[KITlist-Tech] Senior Verification Engineer –Instruction Set Validation (Silicon Valley, CA)

Please direct your responses to: sondra.ostergaard@smachines.com

Company Description
Very exciting, fast growing, 4 year old start- up company currently in stealth mode, developing interesting SoCs & platforms & working on the latest technology edge, in a close collaboration with various partners and customers. Company is well funded and has solid financial backing from large corporate, strategic and financial investors. Founded by an experienced team with many industry notables involved in various capacities. Company currently employs approximately around 75 people in US and ramping up the team to close to 100. Company currently has close to 125 people worldwide


Description:

Senior Verification Engineer –Instruction Set Validation

We are hiring an experienced verification engineer who can help develop our microprocessor architecture verification test suite and instruction set verification test suite. You are someone who is familiar with characterizing processor architectures, writing directed and random microprocessor tests, developing random system-level stress tests, as well as developing tools for engineering bringup and manufacturing. You will work closely with both hardware engineers and software engineers to design, develop, and debug our next-generation processor architecture.

MINIMUM REQUIREMENTS:
- BS or higher degree in Computer or Electrical Engineering, Computer Science, or related degree
- Minimum 5 years of industry experience validating processor implementations.
-Experience with microprocessor characterization
- Experience writing directed and random microprocessor validation tests
- Experience writing system-level stress tests
- Experience writing bringup and manufacturing tools
- Experience with ARM and x86 architecture a plus

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