Wednesday, August 25, 2010

[KITlist-Tech] Manager, Mask Layout Design/CMOS Analog/RF IC (Silicon Valley, CA)

 


Please direct your responses to: elise@skylinerecruiting.com

local candidates please

please refer to: Job ID: 2908

Job Title: Manager, Mask Layout Design/CMOS Analog/RF IC

Term: perm

Job Description:
Our client is a fab-less semiconductor startup located in Fremont. The are developing wireless chipsets to speed up delivery of HDTV and other multimedia services over standard WiFi Networks. They are seeking a Manager, Mask Layout Design/CMOS Analog/RF IC to add to their team. The successful candidate will be a key member of a world class RFIC design team designing cutting-edge CMOS RF integrated circuits for ultra-high performance carrier-grade MIMO systems.

Required Skills:
8+ years of hands-on experience in CMOS RF transceivers operating at GHz frequencies.
Excellent skills in block -level designs, top level integration, floor planning.
Solid track record in full chip assembly and verification.
Experience w/ building and managing a team of world class layout designers.
Expert in Cadence Virtuoso tool-suite, XL, DIVA, ASSURA, and Mentor Calibre.
Experience taking chip designs into high-volume production w/ minimum revisions.
Deep understanding of layout techniques, design rules, isolation, device matching, low parasitic, and DFM for high-yield, high-volume manufacturing.
Demonstrated record in being very efficient and productive.
Experience w/ TSMC processes and SKILL programming.

send resume to: elise@skylinerecruiting.com

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