Company Description
Synaptics is the leading worldwide developer of user interfacesolutions for mobile computing, communications and entertainmentdevices. Our mission is to enrich the interaction between users andtheir intelligent devices. Synaptics products emphasize ease of use,small size, low power consumption, advanced functionality, durabilityand reliability, making them applicable to a multitude of markets,including notebook computers, PC peripherals, mobile phones, andportable entertainment devices such as MP3 players.
Job Responsibilities
The IC Design team is searching for a hands-on, team oriented, IC design engineer with strong digital design, synthesis, place and route and static timing expertise. In this role, the engineer will be responsible for the backend timing closure of highly integrated, mixed-signal integrated circuits that implement innovative capacitive and other touch sensing technologies. You should have good knowledge of RTL coding using Verilog, logic synthesis, timing analysis and place and route.
Responsibilities include:
· Detailed logic design, simulation, synthesis, place and route and static timing for digital sub-systems of system-on-a-chip (SOC) ICs.
· Work closely with Layout Team on constraints for place & route and timing closure.
· The ability to perform full custom layout.
· Schedule tasks and goals to complete designs on time that meet all specifications.
Required Qualifications
· BS or MS in Electrical Engineering with 5 or more years of industry experience is required.
· Experience in using IC design environment such as Synopsys VCS/DVE or Cadence NC-Sim is required.
· A good understanding of testability and design-for-test (DFT), ATPG, BIST is a big plus.
· Experience using IC compiler, DC Topographical, and PrimeTime
· Working knowledge of programming and scripting languages such as C/C++, Perl, TCL, etc.
Desired Qualifications
· Experience with Analog Mixed-Signal (AMS) tools such as Cadence AMS-Designer or Mentor ADMS
· Design skills and experience at the RTL-level
· (Verilog/VHDL)
· Experience with full custom layout
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